Progineer Technologies is a leading outsourcing company that provides a multitude of Software Services spanning the complete software development cycle. The services include:

- Software Architecture and Design
- Software Development
- Quality Assurance (QA) services
- Systems Integration
- Customer Support
- Business Intelligence
- Big Data and Data Analytics
- Hardware Design Verification.

We are looking for an outstanding hardware design verification engineer (Fresh graduate or up to 2 years of relevant experience). The engineer will develop and maintain product’s logic validation including full ownership on the random system and validation scripts, define test plans, find bugs and add new tests features to enhance the verification capabilities, integrate tests, and using Synopsys tools like DVE & Verdi for RTL Debug and preparing functional coverage reports, etc.

Our clients; large multinational semiconductor companies.

• BS graduate in Computer or Electrical Engineering.
• Experience in Verilog or HDL languages.
• Experience in verification languages; SystemVerilog or Specman
• Object Oriented Programming skills – advantage.
• Must be familiar with Unix/Linux environment.
• OVM/UVM testbench Experience is a plus.
• Experience in all the verification stages: defining TestPlan, writing TestBenchs, Sequences, Checkers & coverage.
• Understanding of AHB and other bus protocols and system architecture networking domain knowledge (e.g. Ethernet PHY) is a plus.
• Knowledge in scripting in Perl, shell, or python. - is a plus.

Independent learner.

• Independent worker and problem-solver.
• Good interpersonal relationships.
• Ability to convey opinion and requirements.
• Strong English communication skills.