Design Verification Engineer

الوصف الوظيفي

ASAL Technologies is a leading regional Software and IT Services company based in Ramallah – Palestine.

Unique Design Verification job opportunity with ASAL technologies with exposure to a leading international chip manufacturer:

Description:

-Introduce the concepts of System on Chip Design Verification with emphasis on Functional Verification flows and methodologies.
-Teach how to code in Specman e language and system Verilog (OOL) which are the most popular Hardware Description Languages used for embedded controllers (EC) design and verification in semiconductor industry.

-Teach how to write test plan and procedure for the verification.
-Teach how to write and implement design using Verilog HDL (Hardware Description Language).
-Teach how to simulate and verify design functionality using Specman and systemVerilog Simulators and Waveform viewer.

Requirements:


-B.Sc. in computer engineering, Electronic engineering, Electrical engineering.
-Fresh Gradates are encouraged to apply.
-Knowledge of Design for Test, Verilog or HDL.
-Knowledge in integration, debugging, Verification environments and test plan development is a plus.
-Knowledge of functional verification is a plus.
-Knowledge of System level, Chip level, and Block level verification and test bench development is a plus.



Interested candidates can apply their CV through ASAL Technologies website using the following link:


Apply Online

جميع الحقوق محفوظة لموقع جوبس.

متطلبات الوظيفة
تفاصيل الوظيفة
المسمى الوظيفي Design Verification Engineer
آخر موعد للتقديم 30 - Nov - 2016
المكان رام الله والبيرة
نوع الوظيفة دوام كامل
المستوى المهني متوسط الخبرة
الدرجة العلمية البكالوريوس
الخبرة بدون خبرة
آلية التقديم
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